1. Field of the Invention
The invention relates generally to methods for fabricating semiconductor products. More particularly, the invention relates to methods for efficiently monitoring semiconductor structures when fabricating semiconductor products.
2. Description of the Related Art
Common in the semiconductor product fabrication art is the use of field effect transistor devices as switching devices within logic semiconductor products, memory semiconductor products and embedded logic and memory semiconductor products. Field effect transistor devices comprise a gate electrode formed over a semiconductor substrate. The gate electrode defines a channel region within the semiconductor substrate. The gate electrode and the channel region further separate a pair of source/drain regions formed within the semiconductor substrate.
While field effect transistor devices are quite common and essential in the semiconductor product fabrication art, field effect transistor devices are nonetheless not entirely without problems.
In that regard, as field effect transistor device dimensions decrease, it becomes increasingly difficult to form semiconductor products with consistent performance since even small deviations from expected field effect transistor dimensions (in particular gate electrode linewidth and channel linewidth dimensions) may provide for considerable deviations in field effect transistor device performance.
It is thus desirable in the semiconductor product fabrication art to provide methods for efficiently monitoring and controlling field effect transistor device dimensions.
The present invention is directed towards the foregoing object.
Various methods for monitoring and controlling semiconductor device dimensions and performance have been disclosed in the semiconductor product fabrication art.
Included but not limiting among the methods are those disclosed within Hewett et al., in U.S. Pat. No. 6,365,422 (an integrated process control method predicated upon across wafer semiconductor device dimension measurements). The disclosure of the foregoing reference is incorporated herein fully by reference.
Desirable are additional methods for efficiently monitoring and controlling semiconductor device dimensions and performance when fabricating semiconductor products.
The invention is directed towards the foregoing object.